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1 IRMDSS1 ir1110 soft start ic reference design kit for ac motor drives, ups, welders, and other applications complete stand alone converter system ir1110 advanced monolithic soft start ic irkh scr/diode modules up to 20hp drive capability and expansion option of 60hp with added busbars easily detachable scr/diode modules 230/460/575v ac input voltage with 320v-550v factory setting on-board snubber derived +15v, +5v, and ?5v power supply automatic soft charging of dc bus capacitor with adjustable ramp rate controllable dc bus voltage output isolated control inputs for dc bus reference command and override reset function isolated diagnostics outputs for line status protection against dc bus short condition and ac line loss condition fast automatic ramp-back of the dc bus voltage after transient loss of line terminal blocks for 3-phase ac input and dc bus output, up to 40a. figure 1 IRMDSS1 ir1110 reference design kit ac 3-phase or 1-phase input dcbus+ dcbus- ir1110 reference design pcb opto-isolation interface fault status output bus voltage reference figure 2 block diagram
2 IRMDSS1 1. introduction the ir 1110 soft start control ic for a 3-phase half-controlled scr bridge offers a superior means of precharging the dc bus capacitor, in systems such as variable frequency motor drives. it eliminates the commonly used capacitor precharge resistor, and offers other major system operating advantages, as highlighted below. the purpose of the ir 1110 reference design is to provide the potential user of the ir 1110 asic with a fully functional front-end converter, that can be quickly and easily connected into an overall system, for the purpose of demonstrating the operation, evaluating system performance, and reducing design- in time. the ir 1110 reference design, shown in fig. 1, is a self-contained input converter assembly, that accepts three phase or one phase ac line power and delivers controlled dc output to an external bus capacitor and load. a basic schematic is shown in fig 2. the reference design consists of a pcb, containing ir 1110 soft start controller ic and peripheral components, and three attached irkh scr/diode add-a- pak modules. the ir 1110 and peripheral circuits float at the potential of the positive terminal of the rectifier, and drive the scr gates directly without isolation. opto- couplers mounted on the pcb deliver isolated line fault feedback signals. snubbers mounted on the pcb provide dv/ dt protection for the scrs. dc supply voltage for the ir 1110 is derived from the snubber current, and no additional external power supply is required when operating from 3-phase input. when operating continuously from one phase input, an external power supply may be required. ( see section 4 (j) ) it is necessary only to mount the scr modules to a heatsink, connect ac power to the input terminals, and dc bus capacitor and load to the output terminals. the ir 1110 reference design is then ready for operation. this manual provides information necessary to operate the ir 1110 reference design as a functional unit. it is recommended that the user also review the data sheet for the ir 1110 asic. 2. input voltage and output current ratings. the ir 1110 reference design is fitted with ir?s 1600v rated irkh series addapak scr-diode modules. components on the pcb are factory set for an input operating voltage range of 320v to 550v rms, 3-phase, 47 to 63hz. operation at other input line voltages is possible by changing component values on the pcb, as specified in table 1. the ir 1110 reference design can be set up for dedicated 1-phase operation, as detailed in table 1.
3 IRMDSS1 the rated continuous dc output current for 3-phase operation with the factory-fitted terminal blocks (jp2 and jp3), is 25a at 30 c. higher output current, to 40a dc continuous, can be obtained by replacing jp2 and jp3 with the larger optional terminal blocks, (see bill of material) , mounted into holes provided on the pcb. for this current, air flow of approximately 20cfm should be directed across the surface of the pcb. a small muffin fan is suitable for this purpose. output current above 40a can be obtained by removing the jp2 and jp3 terminal blocks, remounting the scr snubber components on the underside of the pcb, and attaching spacers and busbars to the top of the pcb , as illustrated in fig. 3. table 2 gives typical dc output current ratings for 3-phase operation with added busbars, for irkh addapak modules of different ratings. module type dc current total power per module continuous motor hp a w irkh41 65 75 25 irkh56 90 86 30 irkh71 120 112 50 irkh91 145 149 60 irkh105 180 196 75 table2. output current of three phase bridge at maximum output voltage for various irkh series modules note: 1. tcase = 90 c max, tjpk = 115 c 2. scr conduction assumed to be just continuous. actual conduction angle is governed by ac and dc inductance. 3. continuous motor hp based on 150% output for 1 minute.
4 IRMDSS1 3 . setting up the ir 1110 reference design for use. 1. mount the three irkh addapaks on a heatsink. a drill plan for the mounting holes in the heatsink are shown in fig 4. the heatsink must be able to maintain the case temperature of the addapaks at less than 90 c, at full output current. typical losses in each addapak module, for 3-phase operation, are given in table 2. 2. position the pcb over the addapak modules, fitting the gate and auxiliary cathode fast-on terminals attached to the modules into the slots in the pcb. insert washers between the module terminals and the holes in the pcb. insert m5 screws with washers through the holes on the pcb, through the washers on the underside of the pcb, into the terminal holes of the modules, and tighten. solder the top stems of the fast-on terminals into the pcb. for dc current greater than 40a, remove jp2 and jp3 and assemble as illustrated in fig 3. 3. make electrical connections as shown in fig 5. the ir 1110 reference design is now ready for use. 4 . operating features. 4(a) soft charging of the dc bus capacitor. when ac input voltage is switched on, the voltage across the dc bus capacitor ramps up automatically, by phase-control of the scrs. the ramp-up rate is determined by capacitor (c24 + c24a). the factory- fitted value is 3 f. the corresponding ramp-up time is approximately 330ms. the ramp-up time can be reduced by reducing the paralleled combination of c24 and c24a. for example, with c24a removed, and c24 = 1.0uf, the ram-up time is approximately 150ms. 4(b) regulation of the dc bus voltage. the operating bus voltage can be regulated by one of the following methods:
5 IRMDSS1 (1) control of an externally applied 1.4 to 4.0v (nominal) reference voltage, vbusref, applied between jp4/1 and jp4/2. (jp4/1 negative with respect to jp4/2) for test purposes, the bus voltage can be controlled manually, by connecting a 50k o potentiometer between jp4/1 and jp4/3, and changing r52 to 4.53k, (1%). control of the potentiometer resistance from 0 to 50k controls vbusref from approximately 4.0v to 1.4v . this controls the dc bus voltage from maximum to approximately 35 % of the maximum value obtained at maximum input line voltage; e.g. for the factory setting of 550v rms maximum input voltage, the minimum regulated bus voltage is about 270v dc. it should be noted that the potentiometer floats at the potential of the positive terminal of the scr bridge. care must be taken to ensure that the knob of the potentiometer is properly isolated , to avoid the possibility for electrical shock when manually adjusting the potentiometer. (2) a pwm signal can be applied to the input of opto-coupler u5, between jp5/1 and jp5/2, as shown in fig 6. the opto-coupler provides isolation between the pwm input source and the ir 1110 , which floats at the potential of the positive terminal of the rectifier. the frequency of the pwm signal should be in the 1 to 5khz range. the relationship between the on/off duty cycle, d, of the pwm input and the dc bus voltage is approximately: vbus = vbusmax (0.35 + 0.65d ) vbusmax is the maximum bus voltage at maximum input voltage. the bus voltage is regulated to within approximately +-8v, for a change of line voltage of +-80v. rise and fall rates of the bus voltage that are driven by changes in the duty cycle, d, (hence in the average value of vbusref) , are determined by the rate of change of d, and by the load characteristics. the rate of increase of d should be limited to avoid excessive bus capacitor charging current.
6 IRMDSS1 4(c) adjusting the dc loop gain. the voltage regulation loop can exhibit uneven timing between successive scr firing points, with loads that have abnormally high ripple voltage. such ripple instability - should it occur - can be corrected by reducing the dc loop gain. remove the zero ohm link r58. re- insert r58, and insert r54 with values calculated as follows. the dc loop gain will be reduced by a factor of r54/(r54+r58). r54 and r58 should be chosen so that their sum is 200-250k ohms. 4(d) deactivating the voltage regulation function. if regulation of the bus voltage is not required, i.e. the rectifier is always required to deliver maximum possible dc bus voltage in normal operation, connect jp4/1 to jp4/3. note that the soft start function is always activated, whether or not the voltage regulation function is used. 4(e) low line voltage. if the input line voltage falls below the specified minimum operating value, as shown in table 1, the rectifier is deactivated by removal of the scr firing pulses. when the line voltage returns to normal, the bus voltage is automatically ramped back to the set value. 4(f) temporary loss of all three input line voltages. when all three input phases are temporarily lost, the dc bus voltage starts to decreases during the outage. (a) if the bus voltage does not dip below a set fraction, k, of the initial operating bus voltage, vbus1, then when the input voltage returns, the bus capacitor is recharged without phase- control of the scrs. this allows the bus voltage to be restored as quickly as possible for relatively minor dips of bus voltage, and minimizes the effect of the line outage on system operation. IRMDSS1
7 k is given approximately by the following relationship: k vbus1 = ( r r r 80 79 80 + vbus1 ) - 0.1 vllmax = 0.75 vbus1 - 0.1 vllmax note that the value of k can be adjusted, if needed, by changing the value of r79. (b) if the bus voltage dips below k vbus1 during the line outage, then when the input voltage returns, the dc bus voltage is ramped back by scr phase control. 4(g) temporary loss of one input phase. if one input phase is lost during 3-phase operation, for more than 1 to 1 1/2 cycles, the scr firing pulses are removed, deactivating the rectifier. when the missing phase retu rns, the bus voltage ramps back to the set value. without this one-phase shut-down function, the following operating problems could occur: (a) if one input phase is lost while the bus voltage is being regulated to less than the maximum value, the rectifier output voltage can transiently jump to the maximum value when the missing phase returns. this is undesirable, unless there is sufficient inductance in the ac input lines, or in the dc smoothing inductor, (if used), to limit the resulting current. (b) transient loss of one phase during the early part of initial ramp-up can cause a jump of bus voltage to the maximum value, if the missing phase returns while ramp-up is still in prog ress. for these reasons, the ir 1110 reference design is factory-set with the one-phase shut-down function enabled. 4(h) disabling one-phase shut-down at maximum bus voltage, if the voltage regulation function is not used. if the bus voltage regulation function is not used, it may be desired to disable the one phase shut-down function in normal IRMDSS1
8 operation, allowing the rectifier to operate as a one phase bridge when one phase is missing. note that these remarks apply to loss of one phase when the ir1110 is set for normal 3-phase operation. if the ir1110 is set for dedicated 1-phase operation (see table 1), the 1-phase shut down function is inactive. the following modifications disable the one-phase shut-down function at full bus voltage - but keep this function enabled when the output voltage is below a set value during ramp-up. (1) cut traces and add link as illustrated in fig 7. (2) remove r92, r7. (3) add d14, r6, r95, r96, d15, q5, q6. connect 0.1 f across base and emitter of q7. add diode (ma 116ct) across the open r85 pads, with cathode towards pin 41 of the ir 1110. (4) change r101 to 220k, r100 to 0 ohm link. (5) change r53 to 470k, 5%, 1/16w. change c19 to 0.1 f, 6.3v, 10%. remove r58, insert r57 (0 ohm, link). 4(i) dc bus short-circuit. when operating from a 3-phase supply, the ir 1110 reference design automatically limits the fault current when the dc bus is short-circuited. if a bus short-circuit exists when the line voltage is switched on, the scr firing angle will not adv ance to more than about 35 electrical degrees ahead of the line voltage crossover. if a bus short-circuit occurs during operation, the scr firing angle is phased back in less than half a cycle, to within about 35 electrical degrees of the line voltage crossover. short circuit current is thus limited to a much lower level than would be obtained with an uncontrolled rectifier bridge. note that this function is active when the ir 1110 reference design is set up for 3-phase operation, but not for dedicated 1-phase operation. 4(j) omission of on-board scr snubbers/use of external-power supply. the on-board scr snubbers may not be required for dv/dt protection, if external ac line filters are fitted. if the on-board snubbers are omitted, it will be necessary to provide external isolated +-15v (20ma) power to the pcb. the required power supply connections to the pcb are shown in fig 8. IRMDSS1
9 remove the following snubber and associated components: c13, c14, r43, r44, d1, d2, r45, d3, c15, c16, r46, r47, d5, d6, r48, d7, c17, c18, r49, r50, d9, d10, d11. on-board dropping resistors and zener diodes create the required internal +5v and -5v power for the ir 1110, from the applied +-15v input. the rise time of the +-15v voltages during power-up should not be less than 1 millisecond. the primary source for the power supply must be derived from the ac input voltage of the rectifier bridge. it cannot be taken from the main dc bus voltage, because this voltage does not exist until after the ir 1110 has been energized. during power-up, the input to the power supply must be switched on synchronously with the rectifier input voltage. 4(k) external shut-down. external shut-down of the rectifier bridge is implemented by applying a 15ma input to opto-coupler u7, at jp5/3 (+) and jp5/4. 5 . fault feedback signals . isolated fault feedback signals are delivered at the outputs of opto- couplers u6 and u4, as shown in fig 9(a) for the ir 1110 reference design, as factory-set. u6 delivers a multiplexed 3-phase loss/1-phase loss signal; u4 delivers a low line-voltage signal. an integral part of the circuit modification described in section 4(h), is that opto coupler u6 delivers a 3-phase loss fault signal only, without the multiplexed 1-phase loss signal. the one-phase loss signal is now multiplexed with the low line signal. the fault signals for this mode are illustrated in fig 9(b). 6 . use of the pcb with an external scr half-controlled bridge. for test purposes, the ir 1110 reference design pcb by itself can be used with an external scr half-controlled bridge. this is done by detaching the pcb from the irkh addapak modules, and making wired connections between the pcb and the external scr bridge. fig 10 shows a connection diagram. note that the wires from jp2, u, v, w, and the wire from jp3/1, should be run as a twisted bundle. the gate and auxiliary cathode leads for each scr should be run as twisted pairs. also note that zero ohm links must be connected across the open pads r13, r17, r21 that connect to the auxiliary cathode slots on the pcb. IRMDSS1 7 . inductance.
10 during ramp-up, as the scr firing angle advances, the bus capacitor is charged by a succession of current pulses. the peak value of these pulses depends upon the dc bus capacitance, the ramp rate, and the total inductance, i.e. the sum of the ac line inductance and dc smoothing inductance, (if present), in series with the bus capacitor. the inductance needed to limit the normal peak operating current at full bus voltage will typically also limit the peak current during ramp-up to an acceptable level. typically, the source inductance of the line voltage will be sufficient for this purpose. table 3 shows typical maximum peak values of the current pulses during ramp-up, for various values of bus capacitance and line inductance, based on the assumption that there is no dc smoothing inductance. compatible values of full load dc current are shown. these line inductance values correspond to an ac source reactance of about 2%, i.e. the voltage across each line inductance at full current is about 2% of the line to neutral voltage at 50hz. 8 . schematics and bill of material. schematics and bill of materials for the ir1110 reference design are shown on the following pages.
11 option input voltage (47 - 63hz) phase nominal low line shut- down r1 through r11, r25 through r36 c23 c26 c29 r82 r90 r86 r87 r88 c13 through c18 r43 r44 r46 r47 r49 r50 r55 r56 components omitted vrms vrms factory setting 320-550 3 290 464k 1% 1/8w .0082uf 2% 453k 1% 1/16w 1.0m 5% 1/16w 866k 1% 1/16w .33uf 630v 47 ohm 5w in out 1 380-660 3 345 562k 1% 1/8w .0082uf 2% 536k 1% 1/16w 1.0m 5% 1/16w 866k 1% 1/16w .27uf 630v 47 ohm 8w in out 2 160-280 3 145 232k 1% 1/8w .0082uf 2% 226k 1% 1/16w 1.0m 5% 1/16w 866k 1% 1/16w c14 c16 c18 = .33uf, 630v r44 , r47 , r50 = 47 ohm 5w in out replace c13,c15 c17,r43,r46,r49 with shorting links 3 160-280 1 145 232k 1% 1/8w .0068uf 2% 226k 1% 1/16w 3.0m 5% 1/16w 1.0m 1% 1/16w c14 c16 c18 = .33uf, 630v r44 , r47 , r50 = 47 ohm 5w out in replace c13,c15 c17,r43,r46,r49 with shorting links. omit r25, r26,r27,r61,r76 r78,r88,c29,c34 4 80-140 1 72 115k 1% 1/8w .0068uf 2% 113k 1% 1/16w 3.0m 5% 1/16w 1.0m 1% 1/16w c14 c16 c18 = .68uf, 400v r44 , r47 , r50 = 22 ohm 3w out in replace c13,c15 c17,r43,r46,r49 with shorting links. omit r25, r26,r27,r61,r76 r78,r88,c29,c34 table 1. input line voltage options and corresponding component values.
12 IRMDSS1 table 3. typical peak pulsed charging current during ramp-up bus capacitance inductance per line approx. peak pulsed charging current (2ms typ.) typical full load dc current uf uh a a 1500 625 80 20 2000 420 115 30 2500 340 140 40 4000 210 240 70 6000 135 330 100 8500 105 460 140 notes (1) 460v 50hz line input (2) zero dc inductance (3) values of line inductance correspond to about 2% line reactance for the full load current.
13 IRMDSS1 snubber capacitor irkh scr/diode module 10 10 10 spacer spacer spacer 8 bus bar bus bar bus bar snubber resistor 14 14 + - ac input ac input ac input pcb bus bar bus bar all dimensions in mm figure 3 ac input / dc output power connections for high (>40a) current
14 IRMDSS1 40 +/- 0.1 80 +/- 0.1 48 37 165 120 all dimensions in mm pcb outline 40 +/- 0.1 figure 4 mounting holes dimension for heatsink
15 IRMDSS1 ac power input fuses 40a max l+ - sense +sense l- + load note: higher current fuses can be used where the terminal blocks jp2 and jp3 are removed, and the power connections are made as shown in fig 3. pwm controller rv 1 bus voltage regulation rv 1 pwm controller comments max voltage only not needed. connect jp4/1 to jp4/3 not needed. manual potentiometer control connect rv 1 (50k) . change r52 to 4.53k 1%. see sect. 4(b) not needed. caution: rv1 at potential of rectifier pos. term. isolated pwm input not needed. no connection to jp4/1 connect to jp5/1 (+) and jp5/2. see also fig6 l + l - sense + sense - r5 absent absent omit omit inserted present absent connect omit inserted absent present omit connect remove present present connect connect remove fig 5 . electrical connections to the ir1110 reference design. jp3 jp2
16 IRMDSS1 fig 6 . pwm input for controlling the dc bus voltage. external pwm voltage generator r jp5/1 jp5/2 + set r for 12-15 ma input to hcpl0453 u5 hcpl0453 opto coupler ir1110 reference design pcb d 1.0
17 IRMDSS1 fig7 . pcb trace changes for the modification described in section 4(h). 1 2 3 1 2 3 via (a) connected to pin 13 of ir1110 via (b) connecyed to pin 14 of ir1110 (a) before change (b) after change bottom of pcb via (a) via (b) cut trace (1), (2), (3), link via (a) to via (b)
18 IRMDSS1 fig8. connection of external power supply. external power supply +15v com -15v jp4/5 jp4/2 jp4/3 ir1110 reference design pcb
19 IRMDSS1 vcc com r r jp5/10 jp5/9 jp5/8 jp5/7 jp5/6 jp5/5 u4 hcpl0701 hcpl0701 u6 ir1110 reference design pcb. r should be set for 2ma max. (a) normal signal at jp5/6 1- phase loss loss 1/2 cycle 2ms approx. return signal at jp5/9 4ms typ 30ms approx. loss return 3-phase loss low line 150ms typ. 2ms typ. low normal (b)modification in section 4(h) normal 1/2 cycle 2ms approx loss return 1-phase loss 30ms approx loss return 3-phase loss 150ms typ. 2ms typ. normal low low line fig9 fault signals (three phase operation)
20 IRMDSS1 u v w jp2 u v w ac power input optional l optinal l _ + dc bus capacitor + jp3 + _ 1 2 jp1 g c g c g c ir1110 reference design pcb twisted pair twisted pair twisted pair note: insert 0 ohm links across open pads r13, r17, r21 use #24 awg, 1000v rated fig 10 connection diagram for use of pcb with external scr half-controlled bridge. twisted boundle
21 IRMDSS1 soft start reference design kit revised: tuesday, february 16, 1999 IRMDSS1 revision: 1.0 bill of materials february 18,1999 9:54:44 page1 item quantity reference part ______________________________________________ 1 2 c1 ,c3 330u 6.3v 2 7 c2 ,c4,c6,c7,c9,c11,c25 .1uf 10% 50v 3 1 c5 100u 16v 4 3 c8 ,c10,c12 .0047uf 25v 5 6 c13 ,c14,c15,c16,c17,c18 .33u 630v 6 1 c19 .22u 7 1 c20 .001u 8 1 c21 .022u 9 1 c22 .1u 10% 50v (not inserted) 10 3 c23 ,c26,c29 .0082uf 50v 11 2 c24 ,c24a 1.5u 12 1 c27 .1uf 5% 16v 13 1 c28 1000p 14 1 c30 3300p 15 2 c31 ,c35 .33uf 16v 16 3 c32 ,c33,c34 .027u 17 6 d1 ,d2,d5,d6,d9,d10 dl4002 18 3 d3 ,d4,d8 5.1v 500mw 5% 19 1 d7 6.8v 5 % 1w 20 1 d11 15v 5% 1w 21 4 d12 ,d13,d14,d15 ma116ct (note: d12, d14, d15 not inserted) 22 1 jp1 dc bus kelvin inputs 23 1 jp2 630v 32a 3p 24 1 jp3 630v 32a 2p 25 1 jp4 5pin header 26 1 jp5 10pin header 27 3 q1 ,q2,q3 irkh91-16 28 4 q4 ,q5,q6,q7 fmmt4401ct (note: q5, q6 not inserted) 29 8 r1 ,r2,r3,r4,r8,r9,r10, 442k 1% r11 30 1 r5 1 5% 31 12 r7 ,r13,r17,r21,r39,r55, 0 link (note: r13,r17,r21,r56,r57, r56 ,r57,r58,r64,r85,r94 r85,r94 not inserted.) 32 1 r12 150 33 3 r14 ,r18,r22 56 34 3 r15 ,r19,r23 43 35 3 r16 ,r20,r24 5.6k 36 12 r25 ,r26,r27,r28,r29,r30, 464k 1% r31 ,r32,r33,r34,r35,r36 37 2 r38 ,r37 1k 5% 1/8w 38 1 r40 1.69k 1% 39 1 r41 2k 5% 1/16w
22 IRMDSS1 soft start reference design kit revised: tuesday, february 16, 1999 IRMDSS1 revision: 1.0 bill of materials february 18,1999 9:54:44 page1 item quantity reference part ______________________________________________ 40 2 r92 ,r42 6.2k 41 6 r43 ,r44,r46,r47,r49,r50 47 5w 42 1 r45 220 43 1 r48 75 44 1 r51 16.9k 1% 45 1 r52 6.34k 1% 46 1 r53 2m 5% 1/16w 47 3 r54 ,r71,r101 100k (note: r54 not inserted) 48 5 r59 ,r60,r61,r62,r63 9.09k 1% 49 1 r65 430k 50 4 r66 ,r67,r69,r77 2.0m 1% 51 3 r68 ,r72,r76 33.2k 1% 52 4 r70 ,r74,r78,r80 1m 1% 1/16w 53 1 r73 82k 54 1 r75 249k 1% 55 1 r79 332k 1% 56 1 r81 15k 57 1 r82 453k 1% 58 1 r83 47k 5% 1/16w 59 1 r84 10k 1% 60 3 r86 ,r87,r88 866k 1% 61 1 r89 56.2k 1% 62 1 r90 1m 5% 1/16w 63 1 r91 78.7k 1% 64 1 r93 357k 1% 65 1 r95 75k (not inserted) 66 1 r96 470k (not inserted) 67 3 r97 ,r98,r99 470 5% 1/16w 68 1 r100 330k 69 3 u1 ,u2,u3 ir7509 70 2 u6 ,u4 hcpl0701 71 2 u5 ,u7 hcpl0453 72 1 u8 ir1110
23 IRMDSS1 world headquarters: 233 kansas st., el segundo, california 90245, tel: (310) 322 3331 european headquarters: hurst green, oxted, surrey rh8 9bb, uk tel: ++ 44 1883 732020 ir canada: 7321 victoria park ave., suite 201, markham, ontario l3r 2z8, tel: (905) 475 1897 ir germany: saalburgstrasse 157, 61350 bad homburg tel: ++ 49 6172 96590 ir italy: via liguria 49, 10071 borgaro, torino tel: ++ 39 11 451 0111 ir far east: 171 (k&h bldg.), 30-4 nishi- ikebukuro 3-chome, toshima- ku, tokyo japan tel: 81 3 3983 0086 ir southeast asia: 315 outram road, #10-02 tan boon liat building, singapore 0316 tel: 65 221 8371 http://www.irf.com sales offices, agents and distributors in major cities throughout the world. data and specifications subject to change without notice. ? 1998 international rectifier printed in u.s.a. 3-96

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